#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/domain.h>

#define CONFIG_DRAM_BASE 0x80000000

#define PHYS_OFFSET 	(CONFIG_DRAM_BASE)
#define PAGE_OFFSET		(0xC0000000)
@ #define PAGE_OFFSET		(PHYS_OFFSET)
#define TEXT_OFFSET     (0x00008000)

#define KERNEL_RAM_VADDR	(PAGE_OFFSET + TEXT_OFFSET)
#define KERNEL_RAM_PADDR	(PHYS_OFFSET + TEXT_OFFSET)

	.globl	swapper_pg_dir
	.equ	swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000

	.macro	pgtbl, rd
	ldr	\rd, =(KERNEL_RAM_PADDR - 0x4000)
	.endm

#define KERNEL_START	KERNEL_RAM_VADDR
#define KERNEL_END	_end

	.section ".text.head", "ax"
ENTRY(stext)
	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode and irqs disabled
	@ mrc	p15, 0, r9, c0, c0		@ get processor id
	@ bl	__lookup_processor_type		@ r5=procinfo r9=cpuid
	@ movs	r10, r5				@ invalid processor (r5=0)?
	@ beq	__error_p			@ yes, error 'p'
	@ bl	__lookup_machine_type		@ r5=machinfo
	@ movs	r8, r5				@ invalid machine (r5=0)?
	@ beq	__error_a			@ yes, error 'a'
	@ bl	__vet_atags
	bl	__create_page_tables

	/*
	 * The following calls CPU specific code in a position independent
	 * manner.  See arch/arm/mm/proc-*.S for details.  r10 = base of
	 * xxx_proc_info structure selected by __lookup_machine_type
	 * above.  On return, the CPU will be ready for the MMU to be
	 * turned on, and r0 will hold the CPU control register value.
	 */
	ldr	r13, __switch_data		@ address to jump to after mmu has been enabled
	adr	lr, __enable_mmu		@ return (PIC) address
    @ add	pc, r10, #PROCINFO_INITFUNC
	@ adr	pc, __v7_setup
	bl __v7_setup
	@ mov	pc, lr
ENDPROC(stext)

__enable_mmu:
#ifdef CONFIG_ALIGNMENT_TRAP
	orr	r0, r0, #CR_A
#else
	bic	r0, r0, #CR_A
#endif
#ifdef CONFIG_CPU_DCACHE_DISABLE
	bic	r0, r0, #CR_C
#endif
#ifdef CONFIG_CPU_BPREDICT_DISABLE
	bic	r0, r0, #CR_Z
#endif
#ifdef CONFIG_CPU_ICACHE_DISABLE
	bic	r0, r0, #CR_I
#endif

	mov	r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
		      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
		      domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
		      domain_val(DOMAIN_IO, DOMAIN_CLIENT))
	mcr	p15, 0, r5, c3, c0, 0		@ load domain access register
	mcr	p15, 0, r4, c2, c0, 0		@ load page table pointer
	b	__turn_mmu_on
ENDPROC(__enable_mmu)

	.align	5
__turn_mmu_on:
	mov	r0, r0
	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
	mrc	p15, 0, r3, c0, c0, 0		@ read id reg
	mov	r3, r3
	mov	r3, r13
	mov	pc, r3
ENDPROC(__turn_mmu_on)

__create_page_tables:
	pgtbl	r4				@ page table address

	/*
	 * Clear the 16K level 1 swapper page table
	 */
	mov	r0, r4
	mov	r3, #0
	add	r6, r0, #0x4000
1:	str	r3, [r0], #4
	str	r3, [r0], #4
	str	r3, [r0], #4
	str	r3, [r0], #4
	teq	r0, r6
	bne	1b

	@ ldr	r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
	ldr	r7, =0xc0e @ mm_mmuflags

	/*
	 * Create identity mapping for first MB of kernel to
	 * cater for the MMU enable.  This identity mapping
	 * will be removed by paging_init().  We use our current program
	 * counter to determine corresponding section base address.
	 */
	mov	r6, pc
	mov	r6, r6, lsr #20			@ start of kernel section
	orr	r3, r7, r6, lsl #20		@ flags + kernel base
	str	r3, [r4, r6, lsl #2]		@ identity mapping

	/*
	 * Now setup the pagetables for our kernel direct
	 * mapped region.
	 */
	add	r0, r4,  #(KERNEL_START & 0xff000000) >> 18
	str	r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]!
	ldr	r6, =(KERNEL_END - 1)
	add	r0, r0, #4
	add	r6, r4, r6, lsr #18
1:	cmp	r0, r6
	add	r3, r3, #1 << 20
	strls	r3, [r0], #4
	bls	1b

	/*
	 * Then map first 1MB of ram in case it contains our boot params.
	 */
	add	r0, r4, #PAGE_OFFSET >> 18
	orr	r6, r7, #(PHYS_OFFSET & 0xff000000)
	.if	(PHYS_OFFSET & 0x00f00000)
	orr	r6, r6, #(PHYS_OFFSET & 0x00f00000)
	.endif
	str	r6, [r0]

	@ ############################################################################
	@ below all is uncached
	@ ############################################################################
	ldr	r7, =0xc02 @ mm_mmuflags
	/*
	 * Then map device address
	 */
	add	r0, r4, #0X02000000 >> 18
	orr	r6, r7, #(0X02000000 & 0xff000000)
	.if	(0X02000000 & 0x00f00000)
	orr	r6, r6, #(0X02000000 & 0x00f00000)
	.endif
	str	r6, [r0]

	add	r0, r4, #0X02100000 >> 18
	orr	r6, r7, #(0X02100000 & 0xff000000)
	.if	(0X02100000 & 0x00f00000)
	orr	r6, r6, #(0X02100000 & 0x00f00000)
	.endif
	str	r6, [r0]

	add	r0, r4, #0X02200000 >> 18
	orr	r6, r7, #(0X02200000 & 0xff000000)
	.if	(0X02200000 & 0x00f00000)
	orr	r6, r6, #(0X02200000 & 0x00f00000)
	.endif
	str	r6, [r0]

	add	r0, r4, #0X02300000 >> 18
	orr	r6, r7, #(0X02300000 & 0xff000000)
	.if	(0X02300000 & 0x00f00000)
	orr	r6, r6, #(0X02300000 & 0x00f00000)
	.endif
	str	r6, [r0]

	/*
	 * Then map gic
	 */
	add	r0, r4, #0xA00000 >> 18
	orr	r6, r7, #(0xA00000 & 0xff000000)
	.if	(0xA00000 & 0x00f00000)
	orr	r6, r6, #(0xA00000 & 0x00f00000)
	.endif
	str	r6, [r0]

	add	r0, r4, #0xB00000 >> 18
	orr	r6, r7, #(0xB00000 & 0xff000000)
	.if	(0xB00000 & 0x00f00000)
	orr	r6, r6, #(0xB00000 & 0x00f00000)
	.endif
	str	r6, [r0]

	mov	pc, lr
ENDPROC(__create_page_tables)
	.ltorg

#include "head-common.S"
